1. Field of the Invention
The present invention relates to electronic device management systems, and more particularly, to a method and system for memory management.
2. Description of the Related Art
FIG. 1 is a diagram of the architecture of a conventional computer system. A computer system includes a central processing unit (CPU), a memory 13, input devices 14, and output devices 15. All the subsystems of the computer communicate via CPU buses. The memory 13 stores instructions and data for initiating particular tasks, such as adding two numbers, and the data is manipulated by the stored instructions. A CPU is composed of an arithmetic logic unit (ALU) 11 and a control unit (CU) 12. Said units obtain instructions and data from memory, the instructions are then decoded to perform a sequence of programmed tasks. Input/Output devices are used to input and retrieve information from the computer.
The memory 13 is divided into two regions, program memory for storing instructions, and data memory for storing executable data. Two memory architectures have been introduced by Von Neumann and Harvard respectively. FIG. 2a is a diagram of the architecture of conventional Von Neumann computer system. In Von Neumann computer system, only one CPU bus is provided for communication between the CPU 211 and memory 212, resulting in excessive processing time. FIG. 2b is a diagram of the architecture of conventional Harvard computer system. The program memory 222 and data memory 223 of the Harvard system use separate CPU buses to communicate, alleviating the above limitation.
An instruction execution cycle includes two cycles, a fetch cycle when a CPU reads an instruction from program memory, and an execution cycle after the instruction is decoded by the CPU. The entire instruction execution cycle comprises the various steps of instruction fetching, decoding, data reading, instruction execution, and result storage.
An instruction set contains a number of instructions recognizable by a particular CPU. The instruction is a command encoded in 1's and 0's that initiates a CPU to complete a particular task, composed of a unique operation code (op-code) and operands if required. The instruction set contains three kinds of instruction, arithmetic logic instruction, data move instruction and control instruction. The arithmetic logic instructions carry out arithmetic and logic operations, such as add, subtract and bitwise “AND” operations. The data move instructions move data from a memory to a CPU and vice versa, from an input device to the CPU, from the CPU to an output device and from one CPU register to another. The control instructions alter the order in which a list of instructions is carried out, also called sequence control instructions.
An executable program is composed of multiple instructions, loaded into particular regions of program memory to perform a series of operations. In regular situations, the CPU fetches instructions to execute from these regions. Otherwise, the CPU fetches and executes instructions from unoccupied regions of program memory, or data memory, which may potentially cause stack overflow, data disturbance, or crash the computer.
In view of these limitations, a need exists for a system and method that prevent potential damage caused by fetching instructions from an unoccupied region of the memory to execute.